A full CMOS emitter-coupled logic (ECL)-to-CMOS voltage level converter has been developed. A diode-biased accoupled circuit is used to convert digital signals from ECL to CMOS voltage levels for use in digital data transmission. This technique makes the receiver insensitive to variations in input signal noise and offset voltage with no substantial penalties in conversion delay. The circuit can be used to retrofit all-CMOS systems to a bipolar ECL environment and to benefit from the reduction of chip-to-chip delays using small-signal transmissionline networks.
ASJC Scopus subject areas
- Electrical and Electronic Engineering