VLSI development of smart-pixel ICs: A hybrid DSP core and a multi-threaded programmable DSP

J. Ekman; P. Chandramani; P. Rozier; F. Kiamilev; J. Rorie; F. Zane; P. Marchand; S. Esener

VLSI development of smart-pixel ICs: A hybrid DSP core and a multi-threaded programmable DSP

J. Ekman, P. Chandramani, P. Rozier, F. Kiamilev, J. Rorie, F. Zane, P. Marchand, S. Esener

Research output: Contribution to journal › Conference article › peer-review

Abstract

Two integrated circuits which target the development of digital integrated circuits with the capability to interface with optical devices to yield high-speed/high-bandwidth communication are presented. The first, fabricated with Hewlett-Packard's 14B half-micron process as a part of the 1997 Bell Labs/Lucent Technology CMOS-multiple quantum well (MQW) foundry, is a digital signal processing (DSP) core. The second is a prototype design of the multi-threaded programmable DSP engine that will be a part of the 3-D OESP consortium demonstrator system.

Original language	English (US)
Pages (from-to)	59-60
Number of pages	2
Journal	LEOS Summer Topical Meeting
State	Published - 1998
Externally published	Yes
Event	Proceedings of the 1998 IEEE/LEOS Summer Topical Meeting - Monterey, CA, USA Duration: Jul 20 1998 → Jul 24 1998

ASJC Scopus subject areas

Atomic and Molecular Physics, and Optics
Electrical and Electronic Engineering

Cite this

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title = "VLSI development of smart-pixel ICs: A hybrid DSP core and a multi-threaded programmable DSP",

abstract = "Two integrated circuits which target the development of digital integrated circuits with the capability to interface with optical devices to yield high-speed/high-bandwidth communication are presented. The first, fabricated with Hewlett-Packard's 14B half-micron process as a part of the 1997 Bell Labs/Lucent Technology CMOS-multiple quantum well (MQW) foundry, is a digital signal processing (DSP) core. The second is a prototype design of the multi-threaded programmable DSP engine that will be a part of the 3-D OESP consortium demonstrator system.",

author = "J. Ekman and P. Chandramani and P. Rozier and F. Kiamilev and J. Rorie and F. Zane and P. Marchand and S. Esener",

year = "1998",

language = "English (US)",

pages = "59--60",

journal = "LEOS Summer Topical Meeting",

issn = "1099-4742",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "Proceedings of the 1998 IEEE/LEOS Summer Topical Meeting ; Conference date: 20-07-1998 Through 24-07-1998",

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TY - JOUR

T1 - VLSI development of smart-pixel ICs

T2 - Proceedings of the 1998 IEEE/LEOS Summer Topical Meeting

AU - Ekman, J.

AU - Chandramani, P.

AU - Rozier, P.

AU - Kiamilev, F.

AU - Rorie, J.

AU - Zane, F.

AU - Marchand, P.

AU - Esener, S.

PY - 1998

Y1 - 1998

N2 - Two integrated circuits which target the development of digital integrated circuits with the capability to interface with optical devices to yield high-speed/high-bandwidth communication are presented. The first, fabricated with Hewlett-Packard's 14B half-micron process as a part of the 1997 Bell Labs/Lucent Technology CMOS-multiple quantum well (MQW) foundry, is a digital signal processing (DSP) core. The second is a prototype design of the multi-threaded programmable DSP engine that will be a part of the 3-D OESP consortium demonstrator system.

AB - Two integrated circuits which target the development of digital integrated circuits with the capability to interface with optical devices to yield high-speed/high-bandwidth communication are presented. The first, fabricated with Hewlett-Packard's 14B half-micron process as a part of the 1997 Bell Labs/Lucent Technology CMOS-multiple quantum well (MQW) foundry, is a digital signal processing (DSP) core. The second is a prototype design of the multi-threaded programmable DSP engine that will be a part of the 3-D OESP consortium demonstrator system.

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M3 - Conference article

AN - SCOPUS:0031636653

SN - 1099-4742

SP - 59

EP - 60

JO - LEOS Summer Topical Meeting

JF - LEOS Summer Topical Meeting

Y2 - 20 July 1998 through 24 July 1998

ER -

VLSI development of smart-pixel ICs: A hybrid DSP core and a multi-threaded programmable DSP

Abstract

ASJC Scopus subject areas

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