Packaging optoelectronic stacked processors and free-space optical interconnects

S. Esener, P. Marchand, V. Ozguz, Y. Liu, D. Huang, X. Zheng

Research output: Contribution to journalConference articlepeer-review

1 Scopus citations

Abstract

Combining the advantages of 3D chip packaging and optoelectronic array interconnect technologies, it is possible to bring a low-power ultra-compact hardware solutions to systems requiring fast processing and handling of large data arrays. Providing optoelectronic I/O to 3D chip stacks using VCSEL arrays with associated drivers, especially designed optical receivers, and micro-optics to direct the optical signals provide the most efficient way to communicate between the stacks. By integrating these components with a set of packaging techniques ranging from silicon microbench to plastic molded lenses, the practical superiority of this approach in terms of system speed, power and volume metrics is explored.

Original languageEnglish (US)
Pages (from-to)94-95
Number of pages2
JournalConference Proceedings - Lasers and Electro-Optics Society Annual Meeting-LEOS
Volume1
StatePublished - Dec 1 1999
Externally publishedYes
EventProceedings of the 1999 12th Annual Meeting IEEE Lasers and Electro-Optics Society (LEOS'99) - San Francisco, CA, USA
Duration: Nov 8 1999Nov 11 1999

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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