We present a method to optimize the sensitivity of CMOS FSOI receivers that includes the effects of intersymbol interference, clock jitter, and latch set-up times. We also analyze the effects of different photodiode capacitances on receiver sensitivity.
|Original language||English (US)|
|Number of pages||2|
|State||Published - 1997|
ASJC Scopus subject areas
- Control and Systems Engineering
- Electrical and Electronic Engineering
- Industrial and Manufacturing Engineering