TY - JOUR
T1 - New dimensions in D-STOP neural systems
AU - Krishnamoorthy, Ashok V.
AU - Mercklé, Jean
AU - Yayla, Gökçe
AU - Marsden, Gary C.
AU - Mansoorian, Barmak
AU - Ford, Joseph E.
AU - Esener, Sadik C.
N1 - Funding Information:
The authors thank Matthias Blume and Dr. Volkan OzgUz for valuable comments and suggestions. This work was funded by ARPA under grants F-90-0018 and F-92-6 145
Publisher Copyright:
© 1993 Proceedings of SPIE - The International Society for Optical Engineering. All rights reserved.
Copyright:
Copyright 2019 Elsevier B.V., All rights reserved.
PY - 1993/11/9
Y1 - 1993/11/9
N2 - This paper describes a scalable, highly connected, 3-D optoelectronic neural system that uses freespace optical interconnects with silicon-VLSI based hybrid optoelectronic circuits. The system design uses an efficient combination of pulse-width modulating optoelectronic neurons and pulse-amplitude modulating electronic synapses. A prototype system is built and applied to a simple classification problem. An optoelectronic testbench for evaluating learning algorithms suitable for the optoelectronic architecture is implemented. Section 2 briefly describes the hardware requirements for learning neural networks. The fully connected optoelectronic neural architecture is presented in Section 3. The neural system design, including the optical system design, the selection of optimum data encoding methods, and the neuron and synapse circuit designs is presented in section 4. An 8x8 synapse prototype of the optoelectronic neural system is described in section 5. A modification to the architecture that allows an efficient parallel implementation of error backpropagation learning is presented is section 6. The chip-inloop test-bench for learning algorithms is described in section 7. In section 8, future directions for the optoelectronic architecture are discussed; these include limited interconnect neural systems and parallel weight loading that allow receptive fields of arbitrary sizes and connection multiplexing to be achieved.
AB - This paper describes a scalable, highly connected, 3-D optoelectronic neural system that uses freespace optical interconnects with silicon-VLSI based hybrid optoelectronic circuits. The system design uses an efficient combination of pulse-width modulating optoelectronic neurons and pulse-amplitude modulating electronic synapses. A prototype system is built and applied to a simple classification problem. An optoelectronic testbench for evaluating learning algorithms suitable for the optoelectronic architecture is implemented. Section 2 briefly describes the hardware requirements for learning neural networks. The fully connected optoelectronic neural architecture is presented in Section 3. The neural system design, including the optical system design, the selection of optimum data encoding methods, and the neuron and synapse circuit designs is presented in section 4. An 8x8 synapse prototype of the optoelectronic neural system is described in section 5. A modification to the architecture that allows an efficient parallel implementation of error backpropagation learning is presented is section 6. The chip-inloop test-bench for learning algorithms is described in section 7. In section 8, future directions for the optoelectronic architecture are discussed; these include limited interconnect neural systems and parallel weight loading that allow receptive fields of arbitrary sizes and connection multiplexing to be achieved.
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U2 - 10.1117/12.163591
DO - 10.1117/12.163591
M3 - Conference article
AN - SCOPUS:5644248087
VL - 2026
SP - 416
EP - 436
JO - Proceedings of SPIE - The International Society for Optical Engineering
JF - Proceedings of SPIE - The International Society for Optical Engineering
SN - 0277-786X
T2 - Photonics for Processors, Neural Networks, and Memories 1993
Y2 - 11 July 1993 through 16 July 1993
ER -