Abstract
The 3D-OESP consortium is a government-industry-university collaboration dedicated to the development of the technologies required to integrate stacked silicon chips with optoelectronic devices for high-performance computing and switching applications. By utilizing the combined strengths of 3D chip packaging and optoelectronic array interconnect technologies, it is possible to bring a low-power ultra-compact hardware solution to systems requiring fast processing and handling of large data arrays. We believe that, providing optoelectronic I/O to 3D chip stacks using VCSEL arrays with associated drivers, specially designed optical receivers, and micro-optics to direct the optical signals provide the most efficient way to communicate between the stacks. By integrating these components with a set of packaging techniques ranging from silicon micro-bench to plastic molded lenses, we are presently engaged in demonstrating the practical superiority of this approach in terms of system speed, power and volume metrics. We address various aspects of this approach that are being explored within the 3D-OESP consortium.
Original language | English (US) |
---|---|
Title of host publication | 2000 Southwest Symposium on Mixed-Signal Design, SSMSD 2000 |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 7-8 |
Number of pages | 2 |
ISBN (Electronic) | 0780359755, 9780780359758 |
DOIs | |
State | Published - 2000 |
Externally published | Yes |
Event | Southwest Symposium on Mixed-Signal Design, SSMSD 2000 - San Diego, United States Duration: Feb 27 2000 → Feb 29 2000 |
Other
Other | Southwest Symposium on Mixed-Signal Design, SSMSD 2000 |
---|---|
Country | United States |
City | San Diego |
Period | 2/27/00 → 2/29/00 |
ASJC Scopus subject areas
- Signal Processing
- Electrical and Electronic Engineering